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Dr. Ann Kelleher on High-NA EUV in I18A (1/4): > We're aiming to introduce it in more in 2025, and we're setting up our processes so that if for some reason High-NA is not ready, then we will be able to continue without it. (...) anandtech.com/show/17243/anandtech-interview-with-dr-ann-kelleher
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(2/4): > (...) As soon as High-NA is ready, then we'll be able to put it into our product and use it. Good to see they're preparing for both scenarios, with a focus on High-NA, could help to avoid a 10nm debacle.
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(3/4): > The NXE:5000 is currently being built for us at ASML. When I visited ASML late last year, I saw the pieces as it was being built and put together.
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(4/4) > But we're also working with ASML, and as soon as their first High-NA tool is available for us, we will be running some of our experiments in their lab on that. so that will we will be starting as early possible.
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The 18A SRAM Wafer Display during the Intel Investor Meeting was probably the non-High-NA version of the node.
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