Comparisons by TSMC here seem to be to Foveros Gen2 and Foveros Omni.
Of course they're comparing them mostly with stuff that'll be released after those two. (other than SoIC1)
They expect future 51.2 Tbps Switches to be about 2.5x Reticle Limit, using 112G (PAM4) SerDes and multiple dies.
Expected too, first ones on N5/N4 should arrive this year by my guess. (Probably Broadcom first)
InFO-oS: