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In light of the leak by @mooreslawisdead with 112L Sapphire Rapids, I decided to count the PCIe lanes on it. There's 32 PCIe 5.0 lanes, and 24 UPI lanes per die. The general location of the memory PHYs is visible, but not their count. Die shots courtesy of @yuuki_ans @yuuki_ans/1403699835883171843
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It's been leaked for quite a while that SPR has 80 lanes, but this shows that its 128... Even 112 would be cut-down. It's weird that they would consider cutting-down 48 lanes for some SKUs.
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I am aware of the possibility that MCC has 80 lanes and LCC has 64 lanes, but it's weird that MCC's PCIe lane count would have been leaked when there's something with even more lanes.
Redfire75369’s Twitter Archive—№ 2,063
