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In this CGI graphic, I count 76 Neoverse N2 cores, and 8 2x32b LPDDR5/X memory controllers. There's also 64 lanes of, probably NVLink, but possibly PCIe. @never_released/1459654352587612167
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Interconnect seems like a 12x7 mesh with 2 cores at each stop. It kind of looks like 4 separate meshes but a single large one makes more sense.
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Corrections: Cores are likely either Neoverse N3 or Neoverse V2. The mesh is 6x7, not 12x7.
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On another look, it seems like the memory controllers are 4x16b, which does make sense for LPDDR5X. That's what the memory PHYs indicate, at least.
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