-
This diagram shows Freya, which is 20 MiB SRAM, 256 KiB/core, stacked below the main chip, with 3200 TSV's. This provides over 1 TB/s of bandwidth to the cores, which is insane for the time. Last but not least, Polaris is eternal. (3/3) Source: en.wikichip.org/wiki/intel/microarchitectures/polaris
Redfire75369’s Twitter Archive—№ 1,735

