Redfire75369’s avatarRedfire75369’s Twitter Archive—№ 342

      1. That's... interesting? Cache (Relative to SPR): L1I/L1D: 1/2 SPR L2: 1/2 SPR L3: SPR @BenchLeaks/1412286501111664643
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    1. …in reply to @Redfire75369
      This could also be GeekBench 4 reporting dual socket system caches weirdly.
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  1. …in reply to @Redfire75369
    Oh, that is indeed Sapphire Rapids. I've been informed L1 and L2 are per CPU, while L3 is per system.
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